System and method for synchronizing multiple processors during power-on self testing
November 21, 2015. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesBoot framework architecture for dynamic staged initial program load Distributed multi-processor boot system for booting each processor in sequence including watchdog timer for resetting each CPU if it fails to boot Information processing system having a configuration management system for managing the software of the information processing system Network backplane interface having a network management section for managing and configuring networks on the backplane based upon attributes established in a parameter table Patent #: 5649100 InventorsApplicationNo. 561627 filed on 11/21/1995US Classes:713/2Loading initialization program (e.g., booting, rebooting, warm booting, remote booting, BIOS, initial program load (IPL), bootstrapping)ExaminersPrimary: Kriess, Kevin A.Attorney, Agent or FirmInternational ClassG06F 009/06AbstractA method for synchronizing testing of shared memory contained in a multi-processor computer system after reset. The method involves the steps of performing a wake-up procedure by a bootstrap processor on the other processors. Thus, the other processors can assist in testing the shared memory. Next, respective portions of the shared memory are allocated to each of the processors. Finally, upon completion of testing of its respective portion of the shared memory, each processor sets its unique storage unit synchronizing the processors at completion. | |
