Patent References 3705389 Minimal interrupt latency scheme using multiple program counters Multi-tasking low-power controller having multiple program counters Microprogrammed timer processor having a variable loop resolution architecture Patent #: 5664167 InventorsAssigneeApplicationNo. 634732 filed on 04/18/1996US Classes:712/1, PROCESSING ARCHITECTURE712/220, PROCESSING CONTROL713/502, Counting, scheduling, or event timing718/107Multitasking, time sharingExaminersPrimary: Bowler, Alyssa H.Assistant: Davis, Albert W. Jr. Attorney, Agent or FirmForeign Patent References
International ClassG06F 009/00Foreign Application Priority Data1995-05-24 JPAbstractThe present invention provides a program control system including plural programs, plural execution means each of which executes the corresponding program of the plural programs, a memory for storing the plural programs, plural program counters each of which generates an address for reading the corresponding one of the programs from the memory, and a selector for selecting an output of one of the program counters and providing the output to the memory. Each of the programs stored in the memory and executed by the corresponding one of the execution means is indicated by the address generated by the corresponding one of the program counters selected by the selector, and the memory sequentially stores instructions in each of the programs. | |