Physical-to-logical bus mapping scheme for computer systems having multiple PCI bus configuration
August 30, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesMethod and system for managing an operating system definition of a dynamically modifiable I/O configuration System for optional module detection and reconfiguration Configuration and RAM/ROM control of PCI extension card residing on MCA adapter card System for activating and configuring an input/output board in a computer System for counting the number of peripheral buses in each hierarch connected to primary bus for creating map of peripheral buses to locate peripheral devices Patent #: 5542055 InventorsAssigneeApplicationNo. 697809 filed on 08/30/1996US Classes:710/104, System configuring710/312Multiple bridgesExaminersPrimary: Auve, Glenn A.Attorney, Agent or FirmInternational ClassG06F 013/40AbstractA Plug-and-Play (PnP) configuration driver initilization routine and PnP configuration utility for use in PCI bus architectures supporting dynamic I/O bus configurations. The PnP configuration driver includes a logical-to-physical PCI bus mapping scheme maintaining a PCI bus mapping table, and creating a logical-to-physical map table at start-of-day. PCI device drivers access devices through the logical bus numbers, thereby avoiding errors resulting when physical bus numbers change as a result of the addition or removal of buses within a computer system supporting dynamic I/O bus configurations. | |
