Apparatus and method for selecting entries from an array
Patent 5754885 Issued on May 19, 1998. Estimated Expiration Date: 
April 4, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
April 4, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesTag buffer with testing capability Cache miss buffer adapted to satisfy read requests to portions of a cache fill in progress without waiting for the cache fill to complete Data processor having a cache memory capable of being used as a linear ram bank Patent #: 5410669 InventorsApplicationNo. 627653 filed on 04/04/1996US Classes:710/26, Using addressing365/200, Bad bit365/238.5Byte or page addressingExaminersPrimary: Pan, Daniel H.Attorney, Agent or FirmInternational ClassesG06F 009/46G06F 012/10 200.37 200.57 384 589 200.52 AbstractControl circuitry is used to select M entries from an N-entry storage array by viewing the array from both ends. Beginning at both ends of the array, particular bit values or entry content is looked for by the control logic. Once found at both ends, these entries are then used to produce control signals to be sent to a pair of muxes to remove these entries. Then a subset of the original array consisting of the remaining entries of the array is then iterated upon by a similar set of control circuitry for finding and removing the next M entries from the storage array. | |
