U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Floating point processor for a three-dimensional graphics accelerator which includes floating point, lighting and set-up cores for improved performance

Patent 5745125 Issued on April 28, 1998. Estimated Expiration Date: Icon_subject July 2, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Pixel rendering
Patent #: 5136664
Issued on: 08/04/1992
Inventor: Bersack, et al.

Architecture for a high performance three dimensional graphics accelerator
Patent #: 5392393
Issued on: 02/21/1995
Inventor: Deering

Command preprocessor for a high performance three dimensional graphics accelerator
Patent #: 5408605
Issued on: 04/18/1995
Inventor: Deering

Draw processor for a high performance three dimensional graphic accelerator
Patent #: 5440682
Issued on: 08/08/1995
Inventor: Deering

Floating-point processor for a high performance three dimensional graphics accelerator Patent #: 5517611
Issued on: 05/14/1996
Inventor: Deering

Inventors

Application

No. 676096 filed on 07/02/1996

US Classes:

345/503, Coprocessor (e.g., graphic accelerator)345/426, Lighting/shading345/520, Interface (e.g., controller)345/536Plural storage devices

Examiners

Primary: Tung, Kee M.

Attorney, Agent or Firm

International Class

G06F 015/16

Abstract

A floating point processor for a 3-D graphics accelerator which includes improved performance over prior art designs. The floating point processor includes three specialized engines or function units which streamline floating point operations and which provide improved performance over prior systems. In the preferred embodiment, the floating point processor comprises a floating point core (F-core), a lighting core (L-Core), and a set-up core (S-core). Computations for triangles and vectors are split over the three function units for improved efficiency. The F-core processor receives geometry primitive data and performs floating point operations on the received geometry data. The L-Core processor comprises a fixed point computational unit for performing lighting computations. The set-up core comprises a fixed point computational unit for performing set-up calculations for geometric primitives. Therefore, the present invention comprises an improved floating point processor for a three-dimensional graphics accelerator which includes three separate processing units for improved performance.

Other References

  • Deering, et al., "FBRAM: A New Form of Memory Optimized for 3D Graphics," Computer Graphics Proceedings, Annual Conference Series, 1994, pp. 167-174
  • Deering, Michael, "Geometry Compression," Computer Graphics Proceedings, Annual Conference Series, 1995, pp. 13-20
  • Deering, et al., "Leo: A System for Cost Effective 3D Shaded Graphics," Computer Graphics Proceedings, Annual Conference Series, 1993, pp. 101-108
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