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Information processing system and method of computation performed with an information processing system

Patent 5740463 Issued on April 14, 1998. Estimated Expiration Date: Icon_subject July 20, 2015. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Parallel data processor
Patent #: 4908751
Issued on: 03/13/1990
Inventor: Smith

Virtual bit map processor
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Issued on: 07/03/1990
Inventor: Blank

Multi-computer system of the same architecture with cooperative capability and the cooperating method thereof
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Inventor: Xu, et al.

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Patent #: 5339396
Issued on: 08/16/1994
Inventor: Muramatsu, et al.

Data transfer device and multiprocessor system
Patent #: 5513364
Issued on: 04/30/1996
Inventor: Nishikawa

Multiprocessor memory managing system and method for executing sequentially renewed instructions by locking and alternately reading slave memories
Patent #: 5522060
Issued on: 05/28/1996
Inventor: Kawase, et al.

Method and apparatus for integrated local and express routing in a multiprocessor
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Inventor: Geist

Advanced parallel processor including advanced support hardware Patent #: 5588152
Issued on: 12/24/1996
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Inventors

Application

No. 504583 filed on 07/20/1995

US Classes:

712/11, Array processor element interconnection712/12Cube or hypercube

Examiners

Primary: Pan, Daniel H.

Attorney, Agent or Firm

Foreign Patent References

  • 0536946A3 EP. 04/18/1993
  • 0 536946 A2 EP. 04/18/1993
  • 63-147258 JP. 06/18/1988
  • 2 201817 GB. 09/18/1988

International Classes

G06F 013/38
G06F 015/16
377
21
800.14
200.78
800.16
800.11

Foreign Application Priority Data

1994-07-22 JP

Abstract

Intercommunication of data between adjacent element processors (3) is performed through a memory unit (6) which is independently accessible to the respective element processors (3) without interfere with the operations of the other element processors (3). Thus, memory access and data transfer can be achieved without interfere with the operations of individual element processor (3). Furthermore, it becomes possible to solve differential equations by asynchronous communication system.

Other References

  • Microprocessing & Microprogramming, vol. 25, No. 1-5, pp. 229-232, Jan. 1, 1989, E. S. T. Fernandes, et al., "MPH -- A Hybrid Parallel Machine"
  • Journal of Parallel and Distributed Computing, vol. 19, No. 4, pp. 308-322, Dec. 1993, Shlomit Weiss, et al., "Architectural Improvements for a Data-Driven VLSI Processing Array"
  • Parallel Computing, vol. 12, No. 2, pp. 131-144, Nov. 1989, L. Hart, et al., "Asynchronous Multilevel Adaptive Methods for Solving Partial Differential Equations on Multiprocessors: Basic Ideas"
  • Microprocessing & Microprogramming, vol. 20, Nos. 1-3, pp. 113-118, Apr. 1987, C. Siva Ram Murthy, et al., "A Multi-Microprocessor Architecture for Solving Partial Differential Equations"
  • Proceedings of the Third International Conference on Calorimetry in High Energy Physics, pp. 553-566, D. Corsetto, "Programmable Level-1 Trigger for Calorimeter"
  • IEEE Transactions on Consumer Electronics, vol. 36, No. 3, pp. 327-333, Aug. 1, 1990, Ulrich Schmidt, et al., "Data-Driven Array Processor for Video Signal Processing"
  • Data Units: A Process Interaction Paradigm; William P. Delaney, Department of Electrical and Computer Engineering, University of Arizona, Tucson, AZ; David L. Cohn, Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN; Karen M. Tracey and Michael R. Casey, Department of Electrical Engineering, University of Notre Dame, Notre Dame, IN; Mar. 1991, pp. 1-16
  • Using Kernel-Level Support for Distributed Shared Data; David L. Cohn, Paul M. Greenwalt, Michael R. Casey, Matthew P. Stevenson; Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN 46556; March 1991
  • Proceedings of The International Conference on Application Specific Array Processors, pp. 190-201, Sep. 5, 1990, Brent Baxter, et al., "Building Blocks for a New Generation of Application-Specific Computing Systems"
  • Journal of Scientific Computing, vol. 1, No. 1, pp. 53-73, Jun. 26, 1986, Daniel M. Nosenchuck, et al., "Two Dimensional nonsteady Viscous Flow Simulation on the Navier-Stokes Computer Mininode
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