U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Apparatus and method employing a window reset for excessive bit error rate alarm detection and clearing

Patent 5724362 Issued on March 3, 1998. Estimated Expiration Date: Icon_subject September 29, 2015. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

3916379

Continuous on-line link error rate detector utilizing the frame bit error rate
Patent #: 5138616
Issued on: 08/11/1992
Inventor: Wagner, Jr., et al.

Apparatus and method for alerting computer users in a wireless LAN of a service area transition
Patent #: 5467341
Issued on: 11/14/1995
Inventor: Matsukane, et al.

Method and apparatus for testing a radio in a base station without using a radio test unit Patent #: 5570373
Issued on: 10/29/1996
Inventor: Wing

Inventor

Application

No. 536056 filed on 09/29/1995

US Classes:

714/704, Error count or rate714/821Transmission facility

Examiners

Primary: Beausoliel, Robert W. Jr.
Assistant: Tu, Trinh L.

Attorney, Agent or Firm

International Class

G06F 011/00

Abstract

Methods and apparatus for generating and clearing an excessive bit error rate (EBER) alarm are provided and utilize a reset window algorithm. The BIP-8 bytes (e.g., B2 bytes) of incoming data blocks (each block being B frames long) of an STSn telecommunications signal are monitored in an "idle state" for code violation counts (CV). Upon receiving a data block having a code violation count meeting or exceeding a code violation count threshold (CVSET), a counter is initialized in a "crossing calculation state", and a window comprising a plurality (W) of blocks is monitored. The counter counts the number of incoming blocks in the window having a CV which meets or exceeds CVSET. If in the crossing calculation state, the count meets or exceeds its own threshold (X), an alarm state is entered and an EBER alarm is set. If not, the system returns to the "idle state". Once in the alarm state, every received block is monitored for its code violation count. The first received block with a CV count of CVCLR (code violation clear) or less initializes a clearing calculation state" which sets a clearing-counter CC. The clearing counter CC is used to count the number of incoming blocks in the window having a CV of CVCLR or less. If the CC count meets a third threshold value Y within the time window, the alarm is cleared and the system returns to the idle state. Otherwise, the system reverts to the alarm state.

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