Integrated circuit structure with vertical isolation from single crystal substrate comprising isolation layer formed by implantation and annealing of noble gas atoms in substrate
December 16, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3622382 3663308 3865633 3897273 Method and structure for controllng carrier lifetime in semiconductor devices Method for forming dielectrically isolated semiconductor devices with contact to the wafer substrate Thin-film SOI-MOSFET with a body region Method of making silicon material with enhanced surface mobility by hydrogen ion implantation Process for selectively etching diamond Method for forming isolated semiconductor structures Patent #: 5372952 InventorsAssigneeApplicationNo. 771372 filed on 12/16/1996US Classes:257/499, INTEGRATED CIRCUIT STRUCTURE WITH ELECTRICALLY ISOLATED COMPONENTS257/347, Single crystal semiconductor layer on insulating substrate (SOI)257/522, Air isolation (e.g., beam lead supported semiconductor islands)257/E21.335, In Group IV semiconductor (EPO)257/E21.339, Of electrically inactive species in silicon to make buried insulating layer (EPO)257/E21.564SOI together with lateral isolation, e.g., using local oxidation of silicon, or dielectric or polycrystalline material refilled trench or air gap isolation regions, e.g., completely isolated semiconductor islands (EPO)ExaminersPrimary: Meier, Stephen D.Attorney, Agent or FirmInternational ClassesH01L 029/00H01L 027/01 H01L 027/12 H01L 031/039.2 AbstractAn integrated circuit structure vertically isolated electrically from the underlying substrate is formed in/on a single crystal semiconductor substrate, such as a silicon semiconductor wafer, by first implanting the substrate with a sufficient dosage of noble gas atoms to inhibit subsequent recrystallization of the semiconductor lattice in the implanted region during subsequent annealing, resulting in the formation of an isolation layer comprising implanted noble gas atoms enmeshed with semiconductor atoms in the substrate which has sufficient resistivity to act as an isolation layer. The preferred noble gases used to form such isolation layers are neon, argon, krypton, and xenon. When neon atoms are implanted, the minimum dosage should be at least about 6×1015 neon atoms/cm2 to inhibit subsequent recrystallization of the silicon substrate. When argon atoms are implanted, the minimum dosage should be at least about 2×1015 argon atoms/cm2. When krypton is implanted, the minimum dosage should be at least about 6×1014 krypton atoms/cm2. The energy used for the implant should be sufficient to provide an average implant depth sufficient to form, after annealing, the noble gas isolation layer at a depth of at least about 0.5 microns from the surface.Other References
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