Cross channel circuit for an electronic system having two or more redundant computers
System for transferring selected data words between main memory and cache with multiple data words and multiple dirty bits for each address
System for analysis of embedded computer systems Patent #: 5371878
ApplicationNo. 485332 filed on 06/07/1995
US Classes:714/28, Substituted emulative component (e.g., emulator microprocessor)703/28, In-circuit emulator (i.e., ICE)709/248, MULTICOMPUTER SYNCHRONIZING711/100, STORAGE ACCESSING AND CONTROL711/141, Coherency711/144, Cache status data bit711/145, Access control bit711/146, Snooping711/165, Internal relocation717/128Tracing
ExaminersPrimary: Chan, Eddie P.
Assistant: Yip, Vincent
Attorney, Agent or Firm
International ClassesG06F 011/00
AbstractA copy of data in a Host Computer is synchronized with a version located in Shared Memory in a Modular Development System (MDS). Whenever a change in one or more bits in a Line of Data in Shared Memory are detected, a MDS Line Dirty Flag is checked. If the Flag is not set, it is set and a message is sent to the Host Computer that the Line of Data is now dirty. Whenever the Host Computer receives this message for a Line of Data in its visible memory, it sends a request to the MDS to read that Line from Shared Memory and send it to the Host. Otherwise, a Host Line Dirty Flag is set. The Host Computer also sends a request to read a Line of Data when that Line of Data is scrolled onto a screen and the corresponding Host Line Dirty Flag is set.