U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Solid-state image sensor with focal-plane digital photon-counting pixel array

Patent 5665959 Issued on September 9, 1997. Estimated Expiration Date: Icon_subject July 1, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Solid state photo-electric converting device and solid state imaging apparatus employing it
Patent #: 4363963
Issued on: 12/14/1982
Inventor: Ando

Solid state image sensor
Patent #: 4710817
Issued on: 12/01/1987
Inventor: Ando

GaAs focal plane array readout
Patent #: 4929913
Issued on: 05/29/1990
Inventor: Sato

Focal plane array with charge transfer gate
Patent #: 5225696
Issued on: 07/06/1993
Inventor: Bahraman

Method for producing a hybridization of detector array and integrated circuit for readout
Patent #: 5236871
Issued on: 08/17/1993
Inventor: Fossum, et al.

Method for minimizing 1/f and other low frequency noise in signal processing for focal plane array detector system
Patent #: 5306905
Issued on: 04/26/1994
Inventor: Guillory, et al.

CMOS image sensor with pixel level A/D conversion Patent #: 5461425
Issued on: 10/24/1995
Inventor: Fowler, et al.

Inventors

Assignee

Application

No. 673014 filed on 07/01/1996

US Classes:

250/208.1, Plural photosensitive image detecting element arrays250/214LA, Light amplifier type257/E27.14, X-ray, gamma-ray, or high energy radiation imager (measuring X-, gamma- or corpuscular radiation) (EPO)348/298In charge coupled type image sensor

Examiners

Primary: Le, Que T.

Attorney, Agent or Firm

International Class

H01J 040/14

Abstract

A solid-state focal-plane imaging system comprises an N×N array of high gain, low-noise unit cells, each unit cell being connected to a different one of photovoltaic detector diodes, one for each unit cell, interspersed in the array for ultralow level image detection and a plurality of digital counters coupled to the outputs of the unit cell by a multiplexer (either a separate counter for each unit cell or a row of N of counters time shared with N rows of digital counters). Each unit cell includes two self-biasing cascode amplifiers in cascade for a high charge-to-voltage conversion gain (>1 mV/e-) and an electronic switch to reset input capacitance to a reference potential in order to be able to discriminate detection of an incident photon by the photoelectron (e-) generated in the detector diode at the input of the first cascode amplifier in order to count incident photons individually in a digital counter connected to the output of the second cascode amplifier. Reseting the input capacitance and initiating self-biasing of the amplifiers occurs every clock cycle of an integratng period to enable ultralow light level image detection by the array of photovoltaic detector diodes under such ultralow light level conditions that the photon flux will statistically provide only a single photon at a time incident on any one detector diode during any clock cycle.

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