Multi-step planarization process using polishing at two different pad pressures
November 24, 2015. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesMethod for removing protuberances at the surface of a semiconductor wafer using a chem-mech polishing technique Counterbalanced polishing apparatus Method for polishing AlGaAs surfaces 5006482 Method for polish planarizing a semiconductor substrate by using a boron nitride polish stop Forming wide dielectric-filled isolation trenches in semi-conductors Method and apparatus for improving planarity of chemical-mechanical planarization operations Trench planarization techniques Endpoint detection apparatus and method for chemical/mechanical polishing Polishstop planarization method and structure InventorsAssigneeApplicationNo. 562440 filed on 11/24/1995US Classes:438/692, Simultaneous (e.g., chemical-mechanical polishing, etc.)216/2, ETCHING OF SEMICONDUCTOR MATERIAL TO PRODUCE AN ARTICLE HAVING A NONELECTRICAL FUNCTION216/11, FORMING OR TREATING AN ARTICLE WHOSE FINAL CONFIGURATION HAS A PROJECTION216/88, Using film of etchant between a stationary surface and a moving surface (e.g., chemical lapping, etc.)257/E21.244, Involving dielectric removal step (EPO)438/427, Refilling multiple grooves of different widths or depths438/699Plural coating stepsExaminersPrimary: Breneman, R. BruceAssistant: Alanko, Anita Foreign Patent References
International ClassH01L 021/306AbstractA process for polish planarizing a fill material (40) overlying a semiconductor substrate (30) includes a multi-step polishing process. In one embodiment, a second planarization layer (42) is deposited over a fill material (40) and a portion of the fill material (40) is removed leaving a remaining portion (44). The pad pressure of a CMP apparatus (20) is adjusted such that a first pressure is generated during the polishing process. Then, the remaining portion (44) is removed, while operating the CMP apparatus (20) at a second pad pressure. The selectivity of the polishing process is maintained by reducing the pad pressure during the second polishing step. In a second embodiment, after the first polishing step is performed, the remaining portion (44) is removed by an etching process using a portion (46) of second planarization layer (42).Field of SearchUsing film of etchant between a stationary surface and a moving surface (e.g., chemical lapping, etc.)Etchant contains solid particle (e.g., abrasive for polishing, etc.) ETCHING OF SEMICONDUCTOR MATERIAL TO PRODUCE AN ARTICLE HAVING A NONELECTRICAL FUNCTION FORMING OR TREATING AN ARTICLE WHOSE FINAL CONFIGURATION HAS A PROJECTION | |
