Method of encapsulating die and chip carrier
September 2, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesSemiconductor package and method of manufacture thereof Method of sealing an electronic module in a cap Method for bonding electrical leads to electronic devices Method of making sealed housings containing delicate structures Method for coating semiconductor components on a dielectric film Multichip integrated circuit packaging method Method of manufacturing semiconductor device having package structure Method of encapsulating a sensor device using capillary action and the device so encapsulated Electrical component package comprising polymer-reinforced solder bump interconnection Semiconductor chip assemblies with fan-in leads InventorsApplicationNo. 246113 filed on 05/19/1994US Classes:29/841, With encapsulating, e.g., potting, etc.257/791, Including polysiloxane (e.g., silicone resin)257/E21.502, Encapsulation, e.g., encapsulation layer, coating (EPO)257/E23.14, Solid or gel at normal operating temperature of device (EPO)264/272.17, Semiconductor or barrier layer device (e.g., integrated circuit, transistor, etc.)438/126, And encapsulating438/127EncapsulatingExaminersPrimary: Lovering, Richard D.Attorney, Agent or FirmInternational ClassesH01L 021/56H01L 021/60 AbstractA method of packaging a semiconductor chip assembly includes the encapsulation of the same after establishing an encapsulation area and providing a physical barrier for protecting the terminals of a chip carrier. An alternative or supplement to providing a physical barrier is to provide a preform of an encapsulation material which includes a predetermined volume of such material so that only the encapsulation area is filled. For a semiconductor chip assembly which does not yet have an elastomeric layer, a method of simultaneously forming such an elastomeric layer and encapsulating a semiconductor chip assembly is also provided. | |
