Method of producing a semicondutor device having a lead portion with outer connecting terminal

Patent 5656550 Issued on August 12, 1997. Estimated Expiration Date:

March 5, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Abstract Claims Description Full Text

Patent References

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Inventors

Application

No. 611007 filed on 03/05/1996

US Classes:

438/123, Lead frame29/827, Beam lead frame or beam lead device257/786, Configuration or pattern of bonds257/E21.504, Moulds (EPO)257/E23.046, Cross-section geometry (EPO)257/E23.047, Characterized by bent parts (EPO)257/E23.124, Device being completely enclosed (EPO)438/124And encapsulating

Examiners

Primary: Nieblinh, John
Assistant: Turner, Kevin F.

Attorney, Agent or Firm

Armstrong, Westerman Hattori, McLeland & Naughton

Foreign Patent References

62-158352 JP. 07/13/1987
3-25419 JP. 02/13/1991
4-221837 JP. 08/13/1992

International Class

H01L 021/60

Foreign Application Priority Data

1994-08-24 JP

Abstract

This invention relates to a semiconductor device in which a plurality of outer terminals are arranged in a lattice formation on a flat surface. The semiconductor device has a semiconductor chip, a lead member having a lead portion and an outer connecting terminal connected integrally to the lead portion, the lead portion electrically connected to the semiconductor chip, the lead portion extending outwardly from the semiconductor chip, the outer connecting terminal extending downwardly from the lead portion, a sealing resin sealing the semiconductor chip and the lead portion, a bottom face of the semiconductor chip and a bottom face of the lead portion being exposed from the sealing resin, and an insulating member covering the bottom face of the semiconductor chip and the bottom face of the lead portion. Also, the semiconductor device has a semiconductor chip having a predetermined number of electrode pads, a predetermined number of leads electrically connected to the electrode pads, each of the leads having a projecting terminal portion formed by bending the lead, and a resin portion sealing the semiconductor chip and the leads, wherein the terminal portions are exposed from one face of the resin portion.