U.S. patents available from 1976 to present.
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Internetworking device with enhanced packet header translation and memory

Patent 5651002 Issued on July 22, 1997. Estimated Expiration Date: Icon_subject July 12, 2015. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

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Inventors

Assignee

Application

No. 502087 filed on 07/12/1995

US Classes:

370/392, Processing of address header for routing, per se370/401, Bridge or gateway between networks709/234, Data flow compensating709/236Computer-to-computer data framing

Examiners

Primary: Kizou, Hassan
Assistant: Yao, Kwang Bin

Attorney, Agent or Firm

International Classes

H04J 003/26
H04L 012/46
409

Abstract

An internetworking device providing enhanced packet header translation for translating the format of a header associated with a source network into a header format associated with a destination network of a different type than the source network. The device includes a memory for storing an address portion of a received packet header in a first block of buffer locations and the remainder of the received packet in a second block of buffer locations, spaced from the first block of buffer locations by a gap. The gap permits supplemental header information to be written into the buffer when necessary for translation. The device further includes a split memory, having an SRAM portion and a DRAM portion allocated to each buffer, with at least the address portion of a received packet and the gap located in the SRAM portion, so as to optimize the translation performance of the device.

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