Dynamic instruction allocation for a SIMD processor
May 19, 2015. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesScientific processor Instruction set modifier register Multimicroprocessor system Processor High-speed instruction control for vector processors with remapping Microprogram control system SIMD array processor with global instruction control and reprogrammable instruction decoders Flexible ASIC microcomputer permitting the modular modification of dedicated functions and macroinstructions Integrated circuit package for flexible computer system alternative architectures System for accessing graphic data in a SIMD processing environment InventorsAssigneeApplicationNo. 444637 filed on 05/19/1995US Classes:712/248, Writable/changeable control store architecture712/15, Reconfiguring712/22, Single instruction, multiple data (SIMD)712/209, Decoding instruction to accommodate plural instruction interpretations (e.g., different dialects, languages, emulation, etc.)712/245Processing sequence control (i.e., microsequencing)ExaminersPrimary: Donaghue, Larry D.Attorney, Agent or FirmInternational ClassG06F 015/00AbstractA method and apparatus to dynamically allocate instructions to programmable processing element decoders (78, 79, 80) in a SIMD processor (100) includes a source code instruction (71) for the processor is parsed (1) into components (75, 76, 77) that apply to specific processing elements (60, 61, 62). The components (75, 76, 77) are used to determine control signals (90, 91, 92) that must be generated from the processing element instruction decoders (50, 51, 52) in order to execute the given instruction. If a processing element instruction decoder (50, 51, 52) is not capable of producing the necessary control signals (90, 91, 92), the decoder (50, 51, 52) must be reconfigured to do so. Then the processing element instruction (75, 76, 77) that will generate the specified control logic can be determined and returned to the assembler or compiler so that the assembly or compilation of the program can be completed. | |
