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Parallel computer with reconstruction of processor clusters

Patent 5649106 Issued on July 15, 1997. Estimated Expiration Date: Icon_subject May 2, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

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Synchronized parallel processing with shared memory
Patent #: 5056000
Issued on: 10/08/1991
Inventor: Chang

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Inventors

Application

No. 641947 filed on 05/02/1996

US Classes:

709/221, Reconfiguring345/505, Parallel processors (e.g., identical processors)345/541, Shared memory709/208, MASTER/SLAVE COMPUTER CONTROLLING709/216, Accessing another computer's memory710/31, Transfer direction selection710/38, Path selection710/48, Input/Output interrupting710/266, Programmable interrupt processing712/15Reconfiguring

Examiners

Primary: Black, Thomas G.
Assistant: Homere, Jean R.

Attorney, Agent or Firm

Foreign Patent References

  • 6049465 JP. 02/13/1985
  • 194033 JP. 02/13/1989

International Classes

G06F 015/163
G06F 017/00

Foreign Application Priority Data

1991-03-14 JP

Abstract

A parallel computer having a plurality of cluster buses 2 which are connected to the processor (PE) 1 via the selectors 6. The selectors 6 maintain the same condition until the next instruction is received. In this system, the clusters 11 are reconstructed at appropriate timing during the operation of the processor, thus allowing the number of processors PEs in a cluster to be exchanged in response to variation in the process load allocated to each cluster 11. Accordingly, the resources of the computer are used more effectively. The execution environment of each process may be independent. Real time execution of each process can be assured.

Other References

  • Parallel Circuit Simulation Machine Cenju Information Processing, vol. 31, No. 5, May, 1990
  • Ward et al., Computation Structures, Preface, pp. 559-577, 199
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