U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Method and apparatus for initializing a multiprocessor system

Patent 5642506 Issued on June 24, 1997. Estimated Expiration Date: Icon_subject January 16, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Interruption control method for multiprocessor system
Patent #: 4268904
Issued on: 05/19/1981
Inventor: Suzuki ,   et al.

Automatic fault detection and recovery system which provides stability and continuity of operation in an industrial multiprocessor control
Patent #: 4377000
Issued on: 03/15/1983
Inventor: Staab

Multiprocessor interface device
Patent #: 4698753
Issued on: 10/06/1987
Inventor: Hubbins ,   et al.

Multiprocessor system having common memory
Patent #: 4803618
Issued on: 02/07/1989
Inventor: Ita ,   et al.

Apparatus and method for decreasing the memory requirements for BIOS in a personal computer system
Patent #: 5136713
Issued on: 08/04/1992
Inventor: Bealkowski, et al.

Multi-purpose cache memory selectively addressable either as a boot memory or as a cache memory
Patent #: 5155833
Issued on: 10/13/1992
Inventor: Cullison, et al.

Initial BIOS load for a personal computer system
Patent #: 5210875
Issued on: 05/11/1993
Inventor: Bealkowski, et al.

Multiprocessor system with centralized initialization, testing and monitoring of the system and providing centralized timing
Patent #: 5274797
Issued on: 12/28/1993
Inventor: Barlow, et al.

Apparatus and method for steering spare bit in a multiple processor system having a global/local memory architecture
Patent #: 5327548
Issued on: 07/05/1994
Inventor: Hardell, Jr., et al.

Initial program load control system in a multiprocessor system
Patent #: 5349664
Issued on: 09/20/1994
Inventor: Ikeda, et al.

More ...

Inventor

Application

No. 587259 filed on 01/16/1996

US Classes:

713/1, DIGITAL DATA PROCESSING SYSTEM INITIALIZATION OR CONFIGURATION (E.G., INITIALIZING, SET UP, CONFIGURATION, OR RESETTING)709/208MASTER/SLAVE COMPUTER CONTROLLING

Examiners

Primary: Kriess, Kevin A.
Assistant: Courtenay, III, St. John

Attorney, Agent or Firm

Foreign Patent References

  • 61-288262 JP. 12/13/1986
  • 63-5463 JP. 01/13/1988
  • 02-101566 JP. 04/13/1990
  • 3-269758 JP 12/13/1991
  • 6-103250 JP 04/13/1994

International Class

G06F 009/445

Abstract

An apparatus and method for booting a multiprocessor computer system including providing a first portion of boot code to multiple processors for execution, selecting a first processor, the selection based on which of the multiple processors first successfully executes the first portion of the boot code, providing a second portion of the boot code only to the first processor, and the first processor executing the second portion of the boot code to configure the multiprocessor system.

Other References

  • IBM TDB, Dual-Processor Boot Procedure For LAN Services, vol. 35, No. 3, Aug. 1992, pp. 306-316
  • IBM TDB, Power on Machine Check for Multi-Processor System, vol. 25, No. 3B Aug. 1982, pp. 1776-1777
  • IBM TDB, Generalized Interrupt Routing Mask for Global Queues, vol. 37, No. 09, Sep. 1994, pp. 351-354
  • IBM TDB, Hardware/Software Interface for Turning On/Off Processors in an Multirpoessor Environment, vol. 37, No. 09, Sep. 1994, pp. 365-367
  • Electronic Engineering, vol. 57, No. 700, Apr. 1985, D.G. Sporea, et al., "Programmable Timer For Watchdog Functions
PatentsPlus Images
Enhanced PDF formats
loading...
PatentsPlus: add to cart
PatentsPlus: add to cartSearch-enhanced full patent PDF image
$9.95more info
PatentsPlus: add to cart
PatentsPlus: add to cartIntelligent turbocharged patent PDFs with marked up images
$18.95more info
 
Sign InRegister
Username  
Password   
forgot password?