Method and apparatus for interleave/de-interleave addressing in data communication circuits
Patent 5636224 Issued on June 3, 1997. Estimated Expiration Date: 
April 28, 2015. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
April 28, 2015. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesMemory readback check method and apparatus Addressing system for an associative cache memory Patent #: 4631660 InventorsApplicationNo. 430668 filed on 04/28/1995US Classes:714/701, Data formatting to improve error detection correction capability711/154, Control technique711/157, Interleaving711/219Incrementing, decrementing, or shifting circuitryExaminersPrimary: Beausoliel, Robert W. Jr.Assistant: Chung, Phung M. International ClassG06F 011/00AbstractInterleaving/de-interleaving of data is achieved by storing and subsequently retrieving portions of the data from circular buffers (60,70). The circular buffers (60,70) are addressed such that each circular buffer corresponds to an index of data (Bi). Thus, data (80) is written into a circular buffer (60,70) using a first modulo scheme and read using a second modulo scheme, where the second modulo scheme is based on the interleaving scheme. An index array (20) is used to point to the appropriate entry in the circular buffers(60,70) to ensure a proper interleave/de-interleave process.Other References
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