Pipelined multi-stage analog-to-digital converter
December 30, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesWeighted capacitor analog/digital converting apparatus and method Sequential successive approximation analog-to-digital converter Dynamically calibrated successive ranging A/D conversion system and D/A converter for use therein On board self-calibration of analog-to-digital and digital-to-analog converters Pipelined A/D converter Self-calibrating pipelined subranging analog-to-digital converter Pipelined analog-to-digital architecture with parallel-autozero analog signal processing Architecture for high sampling rate, high resolution analog-to-digital converter system Autocalibrated multistage A/D converter Analog-to-digital converter employing a pipeline multi-stage architecture InventorsAssigneeApplicationNo. 366563 filed on 12/30/1994US Classes:341/161, Acting sequentially341/118, CONVERTER COMPENSATION341/120CONVERTER CALIBRATION OR TESTINGExaminersPrimary: Gaffin, JeffreyAssistant: Kost, Jason L. W. Attorney, Agent or FirmInternational ClassH03M 001/38Foreign Application Priority Data1993-12-31 KRAbstractA pipelined multi-stage analog-to-digital converter (ADC) exhibits high speed and high resolution characteristics in a small chip area using a CMOS process. An optimized high resolution multi-stage ADC improves integral non-linearity errors (INL) and differential non-linearity (DNL) errors and hence increases yield. A binary-weighted capacitor array is used in a multiplying digital-to-analog converter (MDAC) in a front-end stage, and a unit capacitor array is used in the MDACs of the latter stages thereof. Offset, feedthrough and gain errors are removed via digital correction. A digital calibration technique is adopted to reduce the non-ideal effects resulting from component mismatch, by measuring all the code errors of the front-end stage, to thereby minimize the midpoint code DNL error without reference to code symmetry. | |
