U.S. patents available from 1976 to present.
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Method for making direct chip attach circuit card

Patent 5634268 Issued on June 3, 1997. Estimated Expiration Date: Icon_subject June 7, 2015. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Multi-layer circuit board bonding method utilizing noble metal coated surfaces
Patent #: 4685210
Issued on: 08/11/1987
Inventor: King ,   et al.

Soldering method
Patent #: 4967950
Issued on: 11/06/1990
Inventor: Legg, et al.

Solder interconnection structure and process for making
Patent #: 4999699
Issued on: 03/12/1991
Inventor: Christie, et al.

Low temperature controlled collapse chip attach process
Patent #: 5075965
Issued on: 12/31/1991
Inventor: Carey, et al.

Solder mass having conductive encapsulating arrangement
Patent #: 5130779
Issued on: 07/14/1992
Inventor: Agarwala, et al.

Method of forming dual height solder interconnections
Patent #: 5251806
Issued on: 10/12/1993
Inventor: Agarwala, et al.

Plastic bottle for containing both under-pressure and non under-pressure liquids
Patent #: 5261543
Issued on: 11/16/1993
Inventor: Ugarelli

Method of manufacturing a circuit carrying substrate having coaxial via holes
Patent #: 5421083
Issued on: 06/06/1995
Inventor: Suppelsa, et al.

Direct chip attachment structure and method Patent #: 5439162
Issued on: 08/08/1995
Inventor: George, et al.

Inventors

Application

No. 476466 filed on 06/07/1995

US Classes:

29/840, By metal fusion29/852, By forming conductive walled aperture in base228/180.22, Lead-less (or "bumped") device257/E21.511, Mounting on insulating member provided with metallic leads, e.g., flip-chip mounting, conductive die mounting (EPO)257/E23.174Conductive vias through substrate with or without pins, e.g., buried coaxial conductors (EPO)

Examiners

Primary: Schwartz, Larry I.
Assistant: Coley, Adrian L.

Attorney, Agent or Firm

Foreign Patent References

  • 0568995 EP. 11/13/1993
  • 62-117346 JP 05/13/1987

International Class

H05K 003/34

Abstract

A structure and a method is disclosed for making a laminated circuit carrier card for the purpose of making a Direct Chip Attached Module (DCAM) with low cost and high reliability. The carrier is made using an organic or an inorganic laminated carrier having at least one surface available for direct chip mount. The chip has at least one solder ball with a cap of low melting point metal. The surface of the carrier has electrical features that are directly connected to the low melting point metal on the solder ball of the chip to form the eutectic and this way the chip is directly attached to the carrier.

Other References

  • W. A. Dawson et al., "Indium-Lead-Indium Chip Joining", IBM Technical Disclosure Bulletin, vol. 11, No. 11, Apr. 1969, p 1528
  • Microelectronics Packaging Handbook, edited by Rao R. Tummala & Eugene J. Rymaszewski, SR28-4413-00, pp. 366-39
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