Hardware implemented locking mechanism for handling both single and plural lock requests in a lock message
May 11, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesData multiprocessing system having protection against lockout of shared data Method and apparatus for assuring adequate access to system resources by processors in a multiprocessor computer system Data processing system incorporating a memory resident directive for synchronizing multiple tasks among plurality of processing elements by monitoring alternation of semaphore data Locking control with validity status indication for a multi-host processor system that utilizes a record lock processor and a cache memory for each host processor Shared computer resource allocation system having apparatus for informing a requesting computer of the identity and busy/idle status of shared resources by command code Multilevel locking system and method Synchronizing and processing of memory access operations in multiprocessor systems using a directory of lock bits Processing system and method including lock buffer for controlling exclusive critical problem accesses by each processor Method and apparatus for avoiding processor deadly embrace in a multiprocessor system Data processing system and memory controller for lock semaphore operations InventorApplicationNo. 241922 filed on 05/11/1994US Classes:710/200, ACCESS LOCKING710/18, Activity monitoring710/36Input/Output access regulationExaminersPrimary: Shah, Alpesh M.Attorney, Agent or FirmInternational ClassesG06F 013/00650 728 800 825 828 835 841 848 287 AbstractA parallel computing system includes multiple nodes, each node including a processor with software control. The parallel computing system includes a distributed lock mechanism that controls access to system resources, the lock mechanism distributed among the multiple nodes, with each node including hardware-based lock processing apparatus. Such apparatus comprises a communication interface for receiving and transmitting control and data messages and a table arrangement for storing plural lock words. A state machine is present in each node and is connected to the table arrangement and to the communications interface and is responsive to a received lock request to perform hardware-controlled lock processing functions. Those functions include: reading a stored lock word from the table arrangement; performing the lock operation on the stored lock word according to parameters in the received lock request; compiling a message which grants the lock request if the comparison indicates a match, or a message denying the lock request if the comparison indicates a non-match, or a message indicating completion of a specified operation. The state machine performs the function without invoking the processor and/or its software control, thereby enabling lock grant/denial/information messages to be handled independently of software controlled processor procedures. | |
