Multi-port random access memory
Patent 5612923 Issued on March 18, 1997. Estimated Expiration Date: 
May 9, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
May 9, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesSemiconductor memory device having a plurality of writing and reading ports for decreasing hardware amount Four port RAM cell Multi-port static random access memory with fast write-thru scheme Patent #: 5473574 InventorsAssigneeApplicationNo. 644081 filed on 05/09/1996US Classes:365/230.05, Multiple port access365/230.06, Particular decoder or driver circuit365/233Sync/clockingExaminersPrimary: Nelms, David C.Assistant: Hoang, Huan Attorney, Agent or FirmInternational ClassG11C 008/00AbstractDisclosed is a design detail for an innovative time multiplexed read port architecture implemented as part of a high-speed 9-port time slot interchange random access memory. It provides a practical, high-speed, low-power and area efficient read port structure to allow eight random access reads per clock cycle. Because all timing is internally generated from a single rising clock transition of a system clock signal, no special control or clocking is required externally to the memory.Other References
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