Dual block still video compander processor
Interpolator for compressed video data
Video stream processing frame buffer controller
High definition TV system
Image information processing apparatus
Dual processor image compressor/expander
Structure of image processing system
Image data processing unit
Parallel processors sequentially encoding/decoding compaction maintaining format compatibility Patent #: 5109226
ApplicationNo. 260646 filed on 06/16/1994
US Classes:358/404, Facsimile memory monitoring345/535, Memory arbitration345/554, Multi-port memory345/555, For storing compressed data358/444Memory interface
ExaminersPrimary: Coles, Sr., Edward L.
Assistant: Stoll, Thomas L.
Attorney, Agent or Firm
International ClassH04N 001/00
AbstractAn image compression system has an image memory accessible from the image bus. Compressed data are stored in a dual-ported memory accessible from both the image bus and the host bus. The compressor/expander accesses the image memory while the host accesses the dual-ported memory. Dual-ported memory allocation schemes and a computer program controlling the image compression system are also provided.