Patent ReferencesDynamically reconfigurable array logic Programmable integrated circuit micro-sequencer device Programmable logic array having a changeable logic structure Programmable gate array with improved interconnect structure, input/output structure and configurable logic block Interference avoidance system for vehicular radar system Integrated circuit computing device comprising a dynamically configurable gate array having a microprocessor and reconfigurable instruction execution means and method therefor Uni and bi-directional signal transfer modes in peripheral controller and method of operating same Real-time line scan processor Wildcard addressing structure for configurable cellular array Patent #: 5500609 InventorAssigneeApplicationNo. 281357 filed on 07/27/1994US Classes:712/39, Externally controlled internal mode switching via pin712/41, RISC712/43, Mode switching712/232Hardwired controllerExaminersPrimary: Sheikh, Ayaz R.Attorney, Agent or FirmInternational ClassG06F 015/31AbstractAn integrated circuit computing device is comprised of a dynamically configurable Field Programmable Gate Array (FPGA). This gate array is configured to implement a RISC processor and a Reconfigurable Instruction Execution Unit. Since the FPGA can be dynamically reconfigured, the Reconfigurable Instruction Execution Unit can be dynamically changed to implement complex operations in hardware rather than in time-consuming software routines. This feature allows the computing device to operate at speeds that are orders of magnitude greater than traditional RISC or CISC counterparts. In addition, the programmability of the computing device makes it very flexible and hence, ideally suited to handle a large number of very complex and different applications. | |