Electrically and thermally enhanced package using a separate silicon substrate
October 25, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3526814 Transistor cooling by heat pipes having a wick of dielectric powder Ceramic heat pipe wick Aluminum-silicon alloy heatsink for semiconductor devices Thermal performance package for integrated circuit chip Thermal treatment of silicon integrated circuit chips to prevent and heal voids in aluminum metallization Silicon substrate multichip assembly High-power, high-performance integrated circuit chip package Semiconductor device using a tape carrier Three-dimensional multichip module systems Patent #: 5111278 InventorsAssigneeApplicationNo. 328939 filed on 10/25/1994US Classes:257/668, On insulating carrier other than a printed circuit board257/676, With structure for mounting semiconductor chip to lead frame (e.g., configuration of die bonding flag, absence of a die bonding flag, recess for LED)257/684, With semiconductor element forming part (e.g., base, of housing)257/702, Of insulating material other than ceramic257/E23.036, Additional leads being wiring board (EPO)257/E23.092, Auxiliary members in encapsulations (EPO)257/E23.135, Fillings or auxiliary members in containers or encapsulations, e.g., centering rings (EPO)257/E23.189Leads being parallel to base (EPO)ExaminersPrimary: Crane, Sara W.Assistant: Ostrowski, David Attorney, Agent or FirmForeign Patent References
International ClassesH01L 023/495H01L 023/06 AbstractAn integrated-circuit package assembly includes a separate silicon substrate to which an integrated-circuit die is fixed. The separate silicon substrate serves as a heat spreader for the integrated-circuit die. The separate silicon substrate to which the integrated-circuit die is fixed is packaged in either a molded package body or a cavity-type package body. For the molded package body, the package body is molded around a leadframe, the integrated-circuit die, and the separate silicon substrate to which the integrated-circuit die is fixed. For a molded package body, the leadframe has bonding fingers formed at the inward ends thereof which are attached to the separate silicon substrate or the lead frame may have a die-attach pad to which is fixed the separate silicon substrate. For the cavity-type package, the package body includes a mounting surface formed adjacent to a cavity formed therein and the mounting surface has the separate silicon substrate fixed to the top surface thereof. The cavity-type body is formed of a ceramic material or as a multi-layer printed-circuit board. One or more interposer areas are formed on the top surface of the silicon substrate for attachment of connection wires from the integrated-circuit die or the leadframe. A portion of the interposer can extend between the integrated circuit die and the top surface of the silicon substrate to accommodate integrated-circuit dies of various sizes. The interposer includes a layer of oxide formed on the surface of the silicon substrate, which layer of oxide is covered with a layer of conductive material.Field of SearchLEAD FRAMEOn insulating carrier other than a printed circuit board With structure for mounting semiconductor chip to lead frame (e.g., configuration of die bonding flag, absence of a die bonding flag, recess for LED) With semiconductor element forming part (e.g., base, of housing) Insulating material Of insulating material other than ceramic | |
