Controlled, gas phase process for removal of trace metal contamination and for removal of a semiconductor layer
December 31, 2013. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3711324 3773578 Method of passivating pn-junction in a semiconductor device Method for forming a thin layer on a semiconductor substrate Method for reducing hot-electron-induced degradation of device characteristics Apparatus for wafer processing with in situ rinse Method of manufacturing a semiconductor device Method of manufacturing semiconductor device Method of selective etching native oxide Rapid thermal oxidation of silicon in an ozone ambient InventorApplicationNo. 005475 filed on 01/15/1993US Classes:438/476, By layers which are coated, contacted, or diffused134/1.3, Semiconductor cleaning257/E21.226, Dry cleaning (EPO)438/694, Combined with coating step438/703Plural coating stepsExaminersPrimary: Breneman, R. BruceAssistant: Whipple, Matthew Attorney, Agent or FirmInternational ClassesH01L 021/311H01L 021/316 AbstractA ultra-clean, ULSI-supportable process is described for cleaning and etching very thin layers of a semiconductor surface in a gaseous ambient at approximately room temperature. An oxidized surface is etched and cleaned in the vapors of azeotropic, aqueous acids. The cleaning properties of the vapors of the aqueous acids are such that metallic contaminants residing at the surface or within the oxidized layer are complexed and later rinsed away in a rinsing process. The surface is then re-oxidized in an ozone ambient, the resultant oxidation reaction being self-limiting such that the oxide layer is grown to a consistent, predetermined thickness. The process may be repeated any number of times depending on the depth at which any contaminants reside.Other References
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