Circuit combining bipolar transistor and JFET's to produce a constant voltage characteristic
Method of making MIS field effect transistor having a lightly-doped region
Fabrication of a semiconductor device containing deep emitter and another transistor with shallow doped region
Protection system for CMOS integrated circuits
Power feeding and input signal switching control system for video tape recorder combined with television receiver and camera in a body Patent #: 4862290
ApplicationNo. 860596 filed on 03/30/1992
US Classes:257/378, Combined with bipolar transistor257/370, Combined with bipolar transistor257/E27.031In combination with vertical bipolar transistor and diode, capacitor, or resistor (EPO)
ExaminersPrimary: Meier, Stephen D.
Attorney, Agent or Firm
Foreign Patent References
International ClassesH01L 029/76
Foreign Application Priority Data1989-01-30 JP
AbstractA semiconductor device comprises a p-type semiconductor substrate, an n-type semiconductor well formed on the substrate and connected to a positive power supply, a p-type semiconductor source formed within the n-type semiconductor well, a p-type semiconductor layer formed within the n-type semiconductor well and having a lower impurity concentration than the p-type semiconductor source, a first gate electrode formed over a region between the p-type semiconductor source and the p-type semiconductor layer through an insulating film, an n-type semiconductor emitter formed over the p-type semiconductor layer within the n-type semiconductor well, a first conductive layer formed over the n-type semiconductor well to connect with said p-type semiconductor source.