U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Surface mount stress relief hidden lead package device and method

Patent 5573172 Issued on November 12, 1996. Estimated Expiration Date: Icon_subject November 29, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

3588616

3762040

Method of providing spacers on an insulating substrate
Patent #: 4184043
Issued on: 01/15/1980
Inventor: Hildering

Printed circiuit board
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Issued on: 11/02/1982
Inventor: Hadersbeck ,   et al.

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Issued on: 09/06/1983
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Low stress leadless chip carrier and method of assembly
Patent #: 4554575
Issued on: 11/19/1985
Inventor: Lucas

Mounting system for stress relief in surface mounted components
Patent #: 4641222
Issued on: 02/03/1987
Inventor: Derfiny ,   et al.

Compliant interconnection and method therefor
Patent #: 4642889
Issued on: 02/17/1987
Inventor: Grabbe

Printed wiring board with zones of controlled thermal coefficient of expansion
Patent #: 4654248
Issued on: 03/31/1987
Inventor: Mohammed

Compliant layer printed circuit board
Patent #: 4658332
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Inventor: Baker ,   et al.

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Inventor

Assignee

Application

No. 346131 filed on 11/29/1994

US Classes:

228/180.22, Lead-less (or "bumped") device228/103, With measuring, testing, indicating, inspecting, or illuminating228/175Plural diverse bonding

Examiners

Primary: Heinrich, Samuel M.

Attorney, Agent or Firm

International Class

H05K 003/34

Abstract

A hidden lead package device is configured to be placed between a leadless component such as a surface mount package (SMP) used to house a SAW device and a standard printed circuit board configured for solder joints in a leadless contact with the printed circuit board. The hidden lead device is made using materials having similar characteristic thermal expansion properties as that of the SMP and printed circuit board pads to which the hidden lead is affixed. The hidden lead extends across the underside of the SMP along the PCB surface. One end of the lead is brazed to an SMP pad and the opposite end is soldered to a communicating PCB pad. The brazing temperature is higher than the reflow temperature for the solder. The hidden lead device causes the relative movement between the leadless carrier and the printed circuit board to occur along a length of the hidden lead and thus minimizes tensional or compressive forces to the solder joints. Such an approach relieves the stress and resulting creep typically seen at solder joints when mounting leadless packages to printed circuit boards. In addition, by segregating the input and output pads and placing the hidden leads to ground pads between those of input and output pads, crosstalk rejection of the components is improved.

Other References

  • Surface-Mount Substrates: The Key In Going Leadless, Howard W. Markstein, Electronic Production, Mar. 1984, pp. 23-30, 53
  • Assembly Design And Reliability, Stephen W. Hinch, 1988 Handbook of Surface Mount Technology, Chap. 6, pp. 153-175
  • SMT Design For Manufacturability, Phil P. Marcoux, 1989, PPM Associates Seminar Manual, pp. 67-74
  • Low-Cost Surface Mount Packaging For Saws, J. Gore, B. Horine, J. Phillips, R. Hoffman and J. Dodge, Oct. 1992, 1992 Ultrasonic Symposium Proceedings, vol. 1 of 2, pp. 129-138
  • Design and Manufacture of High Reliability Surface Mount Assemblies for Aerospace Applications, Gregory L. Horton and Daniel B. Elder, Undated, Internal Report for Sperry Corporation, Aerospace & Marine Group, Commercial Flight Sysems Division, pp. 288-30
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