Patent ReferencesCircuitry for complementing binary numbers Arithmetic circuit for calculating the absolute value of the difference between a pair of input signals Circuit implementation of block matching algorithm Circuit implementation of block matching algorithm with fractional precision Arithmetic circuit for calculating and accumulating absolute values of the difference between two numerical values Motion vector detection circuit used in hierarchical processing of moving picture signal Adder-subtracter for signed absolute values Block-matching motion estimator for video coder Motion estimator Method and apparatus for determining motion vectors for image sequences InventorsApplicationNo. 252564 filed on 06/01/1994US Classes:708/201Absolute value or magnitudeExaminersPrimary: Mai, Tan V.Attorney, Agent or FirmInternational ClassG06F 007/50AbstractAn efficient micro architecture for motion estimation is proposed. It achieves better time and area performance over the existing structures. Through pipelining and effective manipulation of 2's complement arithmetic, the adder complexity is kept to its lowest, while speed for a combined subtraction, absolution and accumulation operations is made as fast as a carry-save addition (CSA).Other References
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