U.S. patents available from 1976 to present.
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Method and apparatus for recording data on recording medium

Patent 5557594 Issued on September 17, 1996. Estimated Expiration Date: Icon_subject December 21, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Method of coding binary data
Patent #: 4501000
Issued on: 02/19/1985
Inventor: Immink ,   et al.

Digital sum value corrective scrambling in the compact digital disc system
Patent #: 4603413
Issued on: 07/29/1986
Inventor: Sinjou ,   et al.

Method of dc-free 8/9 nrz coding using a unique sync word pattern
Patent #: 4775985
Issued on: 10/04/1988
Inventor: Busby

Data converting apparatus
Patent #: 5151699
Issued on: 09/29/1992
Inventor: Moriyama

Modulator circuit for a recording for a digital recording medium Patent #: 5349349
Issued on: 09/20/1994
Inventor: Shimizume

Inventors

Assignee

Application

No. 360349 filed on 12/21/1994

US Classes:

369/59.24, During storage341/58, To or from minimum d.c. level codes360/40In specific code or form

Examiners

Primary: Epps, Georgia
Assistant: Huber, Paul W.

Attorney, Agent or Firm

Foreign Patent References

  • 58-83313-A JP 05/25/1983
  • 58-165454-A JP 09/25/1983
  • 1-27510-B JP 05/25/1989
  • 115751-A JP 04/25/1992

International Class

G11B 007/013

Foreign Application Priority Data

1993-12-21 JP

Abstract

To improve the reliability of reproduction by performing signal processing so that substantially (almost) all DC is eliminated when digital data is recorded on a recording medium such as a magneto-optical disk. When data is recorded on a recording medium such as a magneto-optical disk, generally the digital data is modulated and encoded before being recorded, but sometimes the modulation code is not DC free due to a recording channel code of an NRZI system, etc. According to the present invention, data is divided into parts each having a certain constant length so as to prevent the DC component from building up. A resynchronization signal RESYNC is inserted in the break between the parts, the data is preliminarily modulated and encoded subsequent to the RESYNC, the DC component thereof is counted, and the pattern of the RESYNC is changed in the direction so that the phase becomes a minus value when the sum of the DC components DSV (digital sum value) up to before that RESYNC is a plus value and becomes a plus value when the sum is a minus value, that is, the DSV converges to zero, and the changed data is subjected to modulation and encoding, thereby to reduce the DC component of the recording data.

Other References

  • Patent Abstracts of Japan, vol. 12, No. 162 (E-609), May 17, 1988 and JP-A-62 272 726 (Oki Electric Ind. Co., Ltd.), Nov. 26, 1987
  • Patent Abstracts of Japan, vol. 17, No. 681 (P-1660), Dec. 14, 1993 and JP-A-05 225 709 (Hitachi Ltd.), Sep. 3, 199
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