Dram using word line potential control circuit
May 10, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesAddress decoder circuit Semiconductor memory device having improved write-verify operation Semiconductor memory device with voltage bootstrap Decoder driver circuit for programming high-capacitance lines High voltage switching circuit in a nonvolatile memory Power supply switching circuit Semiconductor memory integrated circuit Dynamic random access memory having improved word line control CMOS voltage level translator circuit Patent #: 5136190 InventorApplicationNo. 240368 filed on 05/10/1994US Classes:327/537, With field-effect transistor326/88, With capacitive or inductive bootstrapping327/543, Using field-effect transistor365/189.09, Including reference or bias voltage generator365/230.06Particular decoder or driver circuitExaminersPrimary: Nelms, David C.Assistant: Tran, Andrew Q. Attorney, Agent or FirmForeign Patent References
International ClassesG05F 003/16G11C 007/00 Foreign Application Priority Data1990-09-12 JPAbstractMemory cells includes at least one memory cell having an n-channel MOS transistor and an n-channel MOS capacitor. A word line is connected to the memory cells. A word line drive circuit for driving the word line includes a p-channel MOS transistor for transferring a potential to the word line. The word line drive circuit is controlled by an output from a word line potential control circuit. The word line potential control circuit applies a power source potential to the word line through the current path of the p-channel MOS transistor in the word line drive circuit when the memory cells are not selected, and the word line potential control circuit applies a potential higher than a potential obtained by adding a threshold voltage of the n-channel MOS transistor to the power source potential to the word line through the current path of the p-channel MOS transistor in the word line drive circuit when the memory cells are selected.Other References
Field of SearchParticular decoder or driver circuitIncluding reference or bias voltage generator Decoding With field-effect transistor Depletion or enhancement CMOS CMOS Field-effect transistor With capacitive or inductive bootstrapping CMOS With field-effect transistor Using field-effect transistor Complementary metal-oxide semiconductor (CMOS) | |
