Apparatus and method for integrating texture memory and interpolation logic in a computer system
Patent 5548709 Issued on August 20, 1996. Estimated Expiration Date: 
March 7, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
March 7, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesTriangle processor for 3-D graphics display system Method and apparatus for generating a texture mapped perspective view Method for generating addresses to textured graphics primitives stored in rip maps Architecture for a high performance three dimensional graphics accelerator Patent #: 5392393 InventorsApplicationNo. 206959 filed on 03/07/1994US Classes:345/552, Texture memory345/501, COMPUTER GRAPHIC PROCESSING SYSTEM345/531, Graphic display memory controller345/557CacheExaminersPrimary: Powell, Mark R.Assistant: Chauhan, U. Attorney, Agent or FirmInternational ClassG06F 012/00AbstractIn a computer graphics system, a semiconductor chip used in performing texture mapping. Textures are input to the semiconductor chip. These textures are stored in a main memory. Cache memory is used to accelerate the reading and writing of texels. A memory controller controls the data transfers between the main memory and the cache memory. Also included within the same semiconductor chip is an interpolator. The interpolator produces an output texel by interpolating from textures stored in memory. The interpolated texel value is output by the semiconductor chip, thereby minimizing transmission bandwidth as well as redundant storage of texture maps in a multi-processor environment.Other References
| |
