Sysplex shared data coherency method
July 16, 2013. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesMethod and means for the sharing of data resources in a multiprocessing, multiprogramming environment Multiprocessing system including a shared cache Multiprocessor shared pipeline cache memory with split cycle and concurrent utilization Method for lock management, page coherency, and asynchronous writing of changed pages to shared external store in a distributed computing system Shared two level cache including apparatus for maintaining storage consistency Method for managing database recovery from failure of a shared store in a system including a plurality of transaction-based systems of the write-ahead logging type Optimum write-back strategy for directory-based cache coherence protocols Multiple caches using state information indicating if cache line was previously modified and type of access rights granted to assign access rights to cache line Configurable, recoverable parallel bus Concurrency management using version identification of shared data as a supplement to use of locks Inventors
ApplicationNo. 860805 filed on 03/30/1992US Classes:711/141, Coherency700/5, Shared memory711/130, Shared cache711/147Shared memory areaExaminersPrimary: Gossage, GlennAttorney, Agent or FirmInternational ClassG06F 013/00AbstractA method for controlling coherence of data elements sharable among a plurality of independently-operating CPCs (central processing complexes) in a multi-system complex (called a parallel sysplex) which contains sysplex DASDds (direct access storage devices) and a high-speed SES (shared electronic storage) facility. Sysplex shared data elements are stored in the sysplex DASD under a unique sysplex data element name, which is used for sysplex coherence control. Any CPC may copy any sysplex data element into a local cache buffers (LCB) in the CPC's main storage, where it has an associated sysplex validity bit. The copying CPC executes a sysplex coherence registration command which requests a SES processor to verify that the data element name already exists in the SES cache, and to store the name of the data element in a SES cache entry if found in the SES cache. Importantly, the registration command communicates to SES the CPC location of the validity bit for the LCB containing that data element copy. Each time another copy of the data element is stored in any CPC LCB, a registration command is executed to store the location of that copy's CPC validity bit into a local cache register (LCR) associated with its data element name. In this manner, each LCR accumulates all CPC locations for all LCB validity bits for all valid copies of the associated data element in the sysplex -- for maintaining data coherency throughout the sysplex. | |
