U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Digital television system

Patent 5526051 Issued on June 11, 1996. Estimated Expiration Date: Icon_subject October 27, 2013. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Imaging system having multiple image copying and hierarchical busing
Patent #: 4363104
Issued on: 12/07/1982
Inventor: Nussmeier

Video signal processing apparatus
Patent #: 4668985
Issued on: 05/26/1987
Inventor: Kurashige ,   et al.

Video signal generating apparatus with color sequencing
Patent #: 4677464
Issued on: 06/30/1987
Inventor: Yamaji ,   et al.

Fault-tolerant serial video processor device
Patent #: 4939575
Issued on: 07/03/1990
Inventor: Childers

Real time processor for video signals
Patent #: 4942470
Issued on: 07/17/1990
Inventor: Nishitani, et al.

System for transmitting a digital video signal including time code signals
Patent #: 5027193
Issued on: 06/25/1991
Inventor: Kani, et al.

Standard independent digitized video system
Patent #: 5079544
Issued on: 01/07/1992
Inventor: DeMond, et al.

Method and apparatus for dynamic channel bandwidth allocation among multiple parallel video coders Patent #: 5115309
Issued on: 05/19/1992
Inventor: Hang

Inventors

Assignee

Application

No. 147249 filed on 10/27/1993

US Classes:

375/240.01, Television or motion video signal348/721Plural processing units

Examiners

Primary: Groody, James J.
Assistant: Burgess, Glenton B.

Attorney, Agent or Firm

Foreign Patent References

  • 31282 JP 02/23/1988

International Classes

H04N 005/907
H04N 007/12

Abstract

A digital television system (10) is provided. System (10) may receive a video signal at composite video interface and separation circuit (16). The video signal is separated into separate video signals by composite video interface and separation circuit (16). The separate video signals are converted to digital video signals in analog to digital converter circuit (18). Line slicer (14) divides each line of digital video signal into a plurality of channels such that each channel may be processed in parallel by channel signal processors (22a) through (22d). Each channel signal processor (22a) through (22d) may provide two lines of output for each line of video input. The processed digital video signals may be formatted for displays (26a) through (26c) in formatters (24a) through (24c).

Other References

  • Hiroshi Miyaguchi, et al, Digital TV With Serial Video Processor, IEEE Transactions on Consumer Electronics, vol. 36, No. 3, Aug. 1990, 318-326
  • Masafumi Yugami, et al, EDTV With Scan-Line Video Processor, IEEE Transactions on Consumer Electronics, vol. 38, No. 3, Aug. 1992, 553-56
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