Multilayered ferroelectric-semiconductor memory-device
February 17, 2015. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3728694 Method of making ferroelectric memory devices Ferroelectric thin film element with (III) orientation Ferroelectric memory device with crosstalk protection in reading/writing operation Integrated, nonvolatile, high-speed analog random access memory Memory material and method for its manufacture Method of fabricating storage capacitors using high dielectric constant materials Patent #: 5416042 InventorApplicationNo. 391239 filed on 02/17/1995US Classes:365/145, Ferroelectric257/295, With ferroelectric material layer257/E21.009, Dielectric having perovskite structure (EPO)257/E21.011Formation of electrode (EPO)ExaminersPrimary: Yoo, Do HyunInternational ClassG11C 011/22AbstractDisclosed is a novel ferroelectric-semiconductor interface memory element for a dual-valued, capacitive memory diode of an integrated circuit which consists of a layer of metal electrode, a layer of diffusion barrier conductor, a layer of ferroelectric material, a layer of semiconductor crystal, and a layer of metal electrode. Also disclosed is an alternative, novel, ferroelectric-semiconductor interface memory element for a dual-valued, capacitive memory diode of an integrated circuit which consists of a layer of metal electrode, a layer of diffusion barrier conductor, a layer of ferroelectric material, another layer of diffusion barrier conductor, a layer of semiconductor crystal, and a layer of metal electrode. The two values of maximum capacitance in a single capacitor are achieved in these capacitive diodes by making use of accumulation, depletion, or inversion of semiconductor surface charges as a result of the orientation of the remnant polarization of ferroelectric in proximity. | |
