Differential sampler circuit
Patent 5510736 Issued on April 23, 1996. Estimated Expiration Date: 
July 21, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
July 21, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesComparator with latch circuit Sample-and-hold unit with high sampling frequency Fast sample and hold circuit configuration Operational track-and-hold amplifier Track-and-hold circuit Fully differential current sample/hold circuit Patent #: 5349305 InventorApplicationNo. 278364 filed on 07/21/1994US Classes:327/91, Including details of sampling or holding327/74, Input signal compared to plural fixed references327/96With differential amplifierExaminersPrimary: Callahan, Timothy P.Assistant: Ton, My-Trang Nu Attorney, Agent or FirmForeign Patent References
International ClassG11C 027/02Foreign Application Priority Data1993-07-22 FRAbstractThe subject of the invention is a differential sampler circuit including a voltage/current converter (1) having two differential inputs (E1a, E1b) and two outputs (S1a, S1b). According to the invention, each of these outputs is linked via an input multiplexer module (2a) to two interposed track-and-hold modules (5a, 6a), in such a way that at any instant one of the track-and-hold modules (5a, 6a) operates in track mode whereas the other (6a, 5a) operates in hold mode. These two modules (5a, 6a) are linked to the output (S4a) of the sampler circuit via an output multiplexer module (7a). This structure makes it possible to double the sampling frequency without increasing the intrinsic speed of the circuit. Each track-and-hold module (5a, 6a) includes an input load (10a, 11a) linked in parallel with a capacitor (C18a, C19a), an output emitter-follower transistor (T20a, T21a), and a switching cell (5-6a). Thus, the high-frequency performance of the circuit is improved.Other References
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