Error checking and correction circuitry for use with an electrically-programmable and electrically-erasable memory array
Self-correcting semiconductor memory device and microcomputer incorporating the same
Method for optimum erasing of EEPROM
Solid state peripheral storage device Patent #: 5359570
ApplicationNo. 148930 filed on 11/08/1993
US Classes:714/763, Memory access365/190For complementary information
ExaminersPrimary: Baker, Stephen M.
Attorney, Agent or Firm
International ClassG06F 011/10
AbstractIn a mixed data encoding scheme for programming data into a flash sector of a flash EEPROM system, a method for determining which data encoding scheme has been used for programming the retrieved data involves examining whether an error correction code of the data indicates an error.
Field of SearchFor complementary information