Method for accessing and transmitting data to/from a memory in packets

Patent 5499385 Issued on March 12, 1996. Estimated Expiration Date:

March 12, 2013. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Abstract Claims Description Full Text

Patent References

3740723

3758761

3771145

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3882470

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Dynamic random access memory misfet integrated circuit
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Inventors

Assignee

Rambus Inc.

Application

No. 849212 filed on 03/05/1992

US Classes:

710/3, Input/Output addressing711/100STORAGE ACCESSING AND CONTROL

Examiners

Primary: Shin, Christopher B.

Attorney, Agent or Firm

Blakely, Sokoloff, Taylor & Zafman

Foreign Patent References

1-166545 JP. 06/18/1989

International Class

G06F 013/00

Abstract

A method of transmitting digital information to a memory circuit of a plurality of memory circuits of a computer system through a multiline bus of the computer system is described. The plurality of memory circuits are coupled together via the multiline bus. The multiline bus has a total number of lines less than a total number of bits in any single address. A first word of a packet is transmitted onto the multiline bus. A second word of the packet is then transmitted onto the multiline bus. The second word of the packet includes a first portion of an address. A third word of the packet is transmitted onto the multiline bus. The third word of the packet includes a second portion of the address.

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