Branch metric computer for a Viterbi decoder of a punctured and pragmatic trellis code convolutional decoder suitable for use in a multi-channel receiver of satellite, terrestrial and cable transmitted FEC compressed-digital television data
Patent 5497401 Issued on March 5, 1996. Estimated Expiration Date: 
November 18, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
November 18, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesBit serial convolutional decoder for VLSI implementation Viterbi decoder with reduced number of data move operations Error correcting coder/decoder High-speed convolutional decoder Noise-immune space diversity receiver Method and apparatus for communicating digital data using trellis coded QAM Adaptive maximum likelihood demodulator Patent #: 5331666 InventorsAssigneeApplicationNo. 342280 filed on 11/18/1994US Classes:375/341, Maximum likelihood decoder or viterbi decoder375/262, Maximum likelihood decoder or viterbi decoder714/759, Look-up table encoding or decoding714/795, Viterbi decoding714/796Branch metric calculationExaminersPrimary: Tse, Young T.Attorney, Agent or FirmInternational ClassH03M 013/12AbstractA branch metric computer for the Viterbi decoder of a convolutional decoder primarily intended for use in a multi-channel compressed-digital television receiver capable of receiving FEC data transmitted over satellite, terrestrial and transmission channels. The branch metric computer employs a RAM, having an effective depth of 2x storage locations and an effective storage-location width of 16 m, which is preloaded with two selectively programmed I and two selectively programmed Q lookup tables, wherein each table entry is made up of four m-bit values,. The RAM is designed to operate with either QPSK punctured-coded I and Q signal inputs or any one of a plurality of different PAM or QAM higher alphabet or an 8-PSK pragmatic trellis-coded 2x -bit I and 2x -bit Q signal inputs to the convolutional decoder that are forwarded as signal inputs to the RAM for controlling the particular I and Q lookup-table entries read out from the RAM. The branch metric computer further comprises (1) a group of eight Manhattan-distance metric computing summers organized into first and second sets of four summers for adding certain combinations of the four m-bit I and Q lookup-table entries read out from the RAM and (2) a network including four comparators with each of them forwarding to the Viterbi decoder the lesser sum output from corresponding ones of the summers of the first and second sets.Other References
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