Three dimensional die packaging in multi-chip modules
Patent 5495394 Issued on February 27, 1996. Estimated Expiration Date: 
December 19, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
December 19, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesElectronic component assembly Compact high density interconnect structure Printed circuit board provided with a higher density of terminals for hybrid integrated circuit and method of fabricating the same Three dimensional high performance interconnection package Patent #: 5371654 InventorsAssigneeApplicationNo. 361062 filed on 12/19/1994US Classes:361/764, Integrated circuit174/252, With cooling means174/255, With particular substrate or support structure257/E25.011, Devices being arranged next and on each other, i.e., mixed assemblies (EPO)361/761, Component within printed circuit board361/783, Having semiconductive device361/784, Plural361/790, Stacked361/792, Plural contiguous boards361/795, Plural dielectric layers361/803, Interconnection details439/66, Conductor is compressible and to be sandwiched between panel circuits439/91Adapted to be sandwiched between preformed panel circuit arrangementsExaminersPrimary: Sparks, DonaldAttorney, Agent or FirmForeign Patent References
International ClassesH05K 001/14H05K 001/18 H05K 001/11 H01R 004/58 AbstractA multi-chip module wherein electrical components, such as integrated circuit devices, are packaged in a three dimensional arrangement. The multi-chip module includes a first, or upper, substrate including a signal layer formed on the top surface of the substrate and at least one integrated circuit device mounted to the top surface of the substrate and electrically connected to the signal layer. The module further includes a second, or internal, substrate, also including a first signal layer formed on the top surface of the substrate and at least one integrated circuit device mounted to the top surface of the substrate and electrically connected with the signal layer formed on the top surface of the second substrate. The second substrate includes a cavity through the substrate corresponding to each integrated circuit device mounted thereto. Each integrated circuit device mounted to the second substrate is placed within its corresponding cavity so that its top and bottom surfaces are flush with the top and bottom surfaces of the second substrate. Electrical signal paths are provided through the first substrate to electrically connect the integrated circuit devices mounted to the first and second substrates, and through the first and second substrates to electrically connect the multi-chip module components and circuitry to a printed circuit board to which the module is mounted. The multi-chip module may include two, three, or more signal layers and substrates connected as described herein.Field of SearchWith cooling meansConvertible shape (e.g., flexible) or circuit (e.g., breadboard) With particular substrate or support structure Preformed panel circuit arrangement (e.g., printed circuit) Micropanel Component within printed circuit board Integrated circuit Plural contiguous boards Thick film component or material Power, voltage, or current layer Plural dielectric layers With separable connector or socket means Plural Connection of components to board With specific dielectric material or layer Capacitor and electrical component By specific pattern on board Having semiconductive device Stacked Having spring member Interconnection details Having flexible connector HOUSING OR PACKAGE For plural devices With discrete components Multiple contact layers separated from each other by insulator means and forming part of a package or housing (e.g., plural ceramic layer package) With provision for cooling the housing or its contents For integrated circuit Panel member having planar surface for supporting circuit and parallel surface for supporting second circuit With provision to conduct electricity from panel circuit to another panel circuit Conductor is compressible and to be sandwiched between panel circuits Flexible panel Micro panel circuit arrangement, e.g., ICM, DIP, chip, wafer, etc. Overlying second, coextensive micro panel circuit arrangement Overlying second preformed panel circuit, both adapted to be electrically connected Flexible panel Adapted to be sandwiched between preformed panel circuit arrangements | |
