U.S. patents available from 1976 to present.
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Method of booting a multiprocessor computer where execution is transferring from a first processor to a second processor based on the first processor having had a critical error

Patent 5491788 Issued on February 13, 1996. Estimated Expiration Date: Icon_subject September 10, 2013. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Multiprocessor for providing fault isolation test upon itself
Patent #: 4181940
Issued on: 01/01/1980
Inventor: Underwood ,   et al.

Fault detection and redundancy management system
Patent #: 4634110
Issued on: 01/06/1987
Inventor: Julich ,   et al.

Error logging data storing system
Patent #: 5155731
Issued on: 10/13/1992
Inventor: Yamaguchi

Method for bootstrap loading in a data processing system comprising searching a plurality of program source devices for a bootstrap program if initial data indicating a bootstrap program source device fails a validity check
Patent #: 5247659
Issued on: 09/21/1993
Inventor: Curran, et al.

Automatic logical CPU assignment of physical CPUs
Patent #: 5408647
Issued on: 04/18/1995
Inventor: Landry

Initialization system for a close-coupled multiprocessor system Patent #: 5418955
Issued on: 05/23/1995
Inventor: Ikeda, et al.

Inventors

Assignee

Application

No. 119424 filed on 09/10/1993

US Classes:

714/13, Prepared backup processor (e.g., initializing cold backup) or updating backup processor (e.g., by checkpoint message)714/23Resetting processor

Examiners

Primary: Nguyen, Hiep T.

Attorney, Agent or Firm

International Class

G06F 011/00

Abstract

A multiprocessor computer system handles the failure of one or more of its processors without totally disabling the system. On power up, all of the CPUs are deactivated except for a CPU in a first physical slot. The power on self test routines review a log of errors and determine if certain critical errors have previously occurred. If so, the CPU in the first physical slot halts operation entirely. If the CPU in the first physical slot is not functioning properly or is halted, the hardware then awakens a CPU in a second physical slot, designates it as the first logical CPU, and the CPU then performs similar diagnostic checks. If it fails, the hardware again tries a third physical CPU and so on. When one CPU passes the initial error review, it proceeds with initialization of the computer system and performs further self testing. If it functions properly, it is designated as the first logical CPU, and retains its designation until the power is cycled. This first logical CPU then awakens the remaining CPUs and boots the rest of the system. If it fails this later self testing by having certain critical errors occur, the logical CPU 0 designation is transferred to another active CPU and the old CPU is halted. The new CPU commences operation effectively where the old CPU halted, so that system initialization is continued not restarted. The power on self test routines then further test the CPU in the first physical slot. Thus, if at least one CPU is operational, the computer system boots and operates.

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