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US Patent 5488003 - Method of making emitter trench BiCMOS using integrated dual layer emitter mask
US Patent Issued on January 30, 1996
Estimated Patent Expiration Date:
March 31, 2013Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
Estimated Patent Expiration Date:
March 31, 2013Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.AbstractA new method of isolating a polysilicon emitter from the base region of a bipolar transistor, trenching the polysilicon emitter into the semiconductor substrate, and maintaining a consistent base width of a bipolar transistor independent of variations in emitter mask thicknesses is disclosed. The polysilicon emitter isolation provides for better electrical breakdown characteristics between the emitter and the base by protecting the dielectric layer between the polysilicon emitter and base regions from defects and contamination associated with the BiCMOS manufacturing environment. The polysilicon emitter is trenched into the semiconductor substrate in order to reduce transistor operation problems associated with hot electron injection. Consistent base widths improve transistor performance uniformity thereby improving manufacturability and reliability. | InventorsApplicationNo. 040673 filed on 03/31/1993US Classes:438/309, FORMING BIPOLAR TRANSISTOR BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS257/565, BIPOLAR TRANSISTOR STRUCTURE257/587, With specified electrode means257/E21.375, Silicon vertical transistor (EPO)257/E21.696, Bipolar and MOS technologies (EPO)257/E29.03, Emitter regions of bipolar transistors (EPO)438/368, Simultaneously outdiffusing plural dopants from polysilicon or amorphous semiconductor438/370, Forming buried region (e.g., implanting through insulating layer, etc.)438/561Dopant source within trench or grooveField of Search257/587, With specified electrode means257/565BIPOLAR TRANSISTOR STRUCTUREExaminersPrimary: Chaudhuri, OlikAssistant: Pham, Long Attorney, Agent or FirmUS Patent References4435898, Method for making a base etched transistor integrated circuitIssued on: 03/13/1984 Inventor: Gaur , et al.5132234, Method of producing a bipolar CMOS device Issued on: 07/21/1992 Inventor: Kim, et al.5192992, BICMOS device and manufacturing method thereof Issued on: 03/09/1993 Inventor: Kim, et al.5196356, Method for manufacturing BICMOS devices Issued on: 03/23/1993 Inventor: Won, et al.5198372, Method for making a shallow junction bipolar transistor and transistor formed thereby Issued on: 03/30/1993 Inventor: Verret5204277, Method of forming bipolar transistor having substrate to polysilicon extrinsic base contact Issued on: 04/20/1993 Inventor: Somero, et al.5213989Method for forming a grown bipolar electrode contact using a sidewall seed Issued on: 05/25/1993 Inventor: Fitch, et al. Foreign Patent References
International ClassH01L 021/265 |
