Addressable shadow port and protocol for serial bus networks
April 24, 2015. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesBus system with address and status conductors Local area network Self testing data processing system with system test master arbitration Arrangement for transmitting digital data Partitioned scan-testing system Method for communicating data on a communication network by token passing Multiple port bus interface controller with slave bus System scan path architecture with remote bus controller System scan path architecture Switch and its protocol for making dynamic connections InventorAssigneeApplicationNo. 427947 filed on 04/24/1995US Classes:370/241, DIAGNOSTIC TESTING (OTHER THAN SYNCHRONIZATION)324/73.1, PLURAL, AUTOMATICALLY SEQUENTIAL TESTS340/825.52, Addressing714/724, Digital logic testing714/730AddressingExaminersPrimary: Olms, Douglas W.Assistant: Patel, Ajit Attorney, Agent or FirmForeign Patent References
International ClassG01R 031/28AbstractA protocol and associated circuitry operable for efficiently extending serial bus capability in system environments is described. The protocol is designed to coexist and be fully compatible with existing serial bus approaches, and in particular an example of application of the invention to a backplane system utilizing the 1149.1 IEEE standard serial bus is detailed. The circuitry and protocol required to couple any one of the boards on the backplane to the serial bus master without modifying the existing serial bus protocol, without adding additional signals, and without affecting the throughput rate of the serial bus is described. The invention advantageously allows the serial bus master to select, communicate with, and deselect backplane boards so that high level test functions may be simultaneously executed and monitored. Additional preferred embodiments are also described.Other References
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