Microprocessor with an external command mode for diagnosis and debugging
Patent 5479652 Issued on December 26, 1995. Estimated Expiration Date: 
October 21, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
October 21, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3639911 3805245 Method and apparatus for assisting in debugging of a digital computer program Interrupt circuitry for microprocessor chip Processor interrupt system Instruction set modifier register Diagnostic/debug machine architecture Microprocessor architecture having internal access means Multiprocessor system Microprocessor architecture for improved chip testability InventorsApplicationNo. 327229 filed on 10/21/1994US Classes:714/30, Built-in hardware for diagnosing or testing within-system component (e.g., microprocessor test mode circuit, scan path)712/43, Mode switching712/227, Specialized instruction processing in support of testing, debugging, emulation714/32Particular stimulus creationExaminersPrimary: Beausoliel, Robert W. Jr.Assistant: Decady, Albert Attorney, Agent or FirmForeign Patent References
International ClassG06F 011/34AbstractA microprocessor is disclosed herein having an external command mode for directly accessing the execution unit, responsive to externally generated commands and instructions. An external instruction path is provided, as well as a conventional processor-driven instruction path. A multiplexer is provided that selects which of the instruction paths is actually supplied to the execution unit. Using the external command mode, the user can examine and modify registers, memory, and I/O space without otherwise affecting their contents. Any instruction executable by the execution unit is executable in the external command mode. Because direct access is provided into the execution unit, there is no implicit updating that would otherwise affect the state of the processor and require saving to an alternate memory. The present invention is implemented with a conventional test access port designed in accordance with the IEEE 1149.1 boundary scan standard, with modification to include an instruction register, a data register, and control logic. The external command mode is applicable to single and multiple pipeline processors. The circuit described herein includes several selectors for selecting between the probe mode and the processor-driven mode of operation, including an external pin, an external command, and a debug exception. For ascertaining if the circuit is in the external command mode, an acknowledge pin is provided to indicate when the execution unit is ready to accept an instruction in the probe model.Other References
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