Fault isolation circuit
Patent 5473752 Issued on December 5, 1995. Estimated Expiration Date: 
January 20, 2015. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
January 20, 2015. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3652798 3716834 Auto isolation circuit for malfunctioning current loop Device for detecting the position of broken line in a series controller Fault isolation and bypass reconfiguration unit System for testing 2B1Q telephony loopback circuits and method therefor Intelligent node resident failure test and response in a multi-node system Patent #: 5278977 InventorsAssigneeApplicationNo. 376068 filed on 01/20/1995US Classes:714/4, Of network714/43Bus, I/O channel, or network path component faultExaminersPrimary: Beausoliel, Robert W. Jr.Assistant: Wright, Norman M. Attorney, Agent or FirmInternational ClassG06F 011/00AbstractA system for detecting and isolating faults in a two-wire communications loop which includes a number of node circuits dispersed along the loop. Each node circuit executes a fault detection algorithm and selectively switches its connections to adjacent node circuits to effectively isolate itself from the fault condition. When all node circuits have completed their respective fault detection algorithms the fault condition is disconnected from the two-wire communications loop. | |
