3916388
Method and processor having bit-addressable scratch pad memory
Patent #: 4135242
Issued on: 01/16/1979
Inventor: Ward , et al.
Data format converting apparatus for use in a digital data processor
Patent #: 4141005
Issued on: 02/20/1979
Inventor: Bonner , et al.
Operand alignment controls for VFL instructions
Patent #: 4189772
Issued on: 02/19/1980
Inventor: Liptay
Data processing system with data cross-block-detection feature
Patent #: 4408275
Issued on: 10/04/1983
Inventor: Kubo , et al.
Multichip data shifting system
Patent #: 4490809
Issued on: 12/25/1984
Inventor: Ueda , et al.
Mechanism for implementing one machine cycle executable mask and rotate instructions in a primitive instruction set computing system
Patent #: 4569016
Issued on: 02/04/1986
Inventor: Hao , et al.
Memory control system
Patent #: 4580214
Issued on: 04/01/1986
Inventor: Kubo , et al.
Pipelined decimal character execution unit
Patent #: 4598365
Issued on: 07/01/1986
Inventor: Boothroyd , et al.
Data processing apparatus for processing operand store conflict
Patent #: 4638429
Issued on: 01/20/1987
Inventor: Watabe , et al.
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Byte addressable memory for variable length instructions and data
Patent #: 4654781
Issued on: 03/31/1987
Inventor: Schwartz , et al.
32-Bit extended function arithmetic-logic unit on a single chip
Patent #: 4785393
Issued on: 11/15/1988
Inventor: Chu , et al.
RISC computer with unaligned reference handling and method for the same
Patent #: 4814976
Issued on: 03/21/1989
Inventor: Hansen , et al.
Apparatus and method for using a single carry chain for leading one detection and for "sticky" bit calculation
Patent #: 4864527
Issued on: 09/05/1989
Inventor: Peng , et al.
Pipelined parallel data processing apparatus for directly transferring operand data between preceding and succeeding instructions
Patent #: 4916606
Issued on: 04/10/1990
Inventor: Yamaoka, et al.
A computer memory for accessing any word-sized group of contiguous bits
Patent #: 4920483
Issued on: 04/24/1990
Inventor: Pogue, et al.
High speed byte data rearranging processor
Patent #: 4931925
Issued on: 06/05/1990
Inventor: Utsumi, et al.
Dual byte order computer architecture a functional unit for handling data sets with differnt byte orders
Patent #: 4959779
Issued on: 09/25/1990
Inventor: Weber, et al.
Virtual instruction cache system using length responsive decoded instruction shifting and merging with prefetch buffer outputs to fill instruction buffer
Patent #: 5113515
Issued on: 05/12/1992
Inventor: Fite, et al.
Apparatus for processing character string moves in a data processing system
Patent #: 5222225
Issued on: 06/22/1993
Inventor: Groves
Processor elements having multi-byte structure shift register for shifting data either byte wise or bit wise with single-bit output formed at bit positions thereof spaced by one byte Patent #: 5287532
Issued on: 02/15/1994
Inventor: Hunt