Viterbi decoder bit efficient chainback memory method and decoder incorporating same
November 21, 2012. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3789360 Method of transmitting binary data sequences and arrangement for enabling the rapid determination of the end of a transmitted binary data sequence Maximum likelihood error correcting technique Path trace viterbi decoder Time-varying trellis-coded modulation formats which are robust in channels with phase variations Method and apparatus for combining encoding and modulation Error detection system Method and apparatus for resolving phase ambiguities in trellis coded modulated data Patent #: 5233630 InventorApplicationNo. 767167 filed on 09/27/1991US Classes:714/792, Trellis code714/795Viterbi decodingExaminersPrimary: Beausoliel, Robert W. Jr.Assistant: Palys, Joseph E. Attorney, Agent or FirmInternational ClassG06F 011/10AbstractA decoder for decoding trellis coded data in which the received signal is assigned a sector value corresponding to the phase of the signal in accordance with a predetermined signal space sectorization format. A Viterbi decoder is used to reconstruct from the received signal an estimate of a data bit that was coded for transmission. This estimate is re-encoded and provided to a trellis output mapper along with the sector value. The trellis mapper in response to the input re-encoded estimate and sector value provides an estimate of an an uncoded data bit transmitted with the coded data bit.Other References
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