Patent ReferencesBandwidth allocation and congestion control scheme for an integrated voice and data network Congestion management based on multiple framing strategy Call control system in ATM switch Duration limited statistical multiplexing in packet networks Call control with transmission priority in a packet communication network of an ATM type Serving constant bit rate traffic in a broadband data switch Packet network with communication resource allocation and call set up control of higher quality of service Bandwidth seizing in integrated services networks Bandwidth management and congestion control scheme for multicast ATM networks Method for prioritizing, selectively discarding, and multiplexing differing traffic type fast packets Patent #: 5231633 InventorAssigneeApplicationNo. 200375 filed on 02/22/1994US Classes:370/412, Queuing arrangement370/229, DATA FLOW CONGESTION PREVENTION OR CONTROL370/468Assignment of variable bandwidth or time period for transmission or receptionExaminersPrimary: Olms, Douglas W.Assistant: Vu, Huy D. Attorney, Agent or FirmInternational ClassH04J 003/22AbstractA wide variety of call traffic is effectively integrated in a single broadband communications network. Calls having widely differing bandwidth requirements and sensitivities to delay are handled by the network with efficient, effective, and fair bandwidth allocation and transmission scheduling. This is accomplished by classifying each call in accordance with certain signal characteristics, such as required bandwidth and sensitivity to delay. Each call class is directed to a separate queuing circuit. Some calls in certain classes, such as those associated with high-bandwidth constant bit rate services, are each directed to their own individual queuing circuits. Other calls within a class are statistically multiplexed into a single queuing circuit for that class. A multiplexing circuit operates in accordance with a dynamic time slice scheme which involves defining a service cycle time period during which the multiplexer withdraws a predetermined number of information packets from each of a plurality of queuing circuits containing information packets and places those predetermined numbers of packets onto an output link. The multiplexer breaks up the cycle time period into a plurality of time slices, each of which determines how many information packets are transmitted from each queuing circuit during the cycle time period. Efficient resource usage and congestion avoidance are further achieved by using one of a number of alternative scheduling techniques for delay insensitive traffic.Other References
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