Substrate for tensilely strained semiconductor
October 29, 2013. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesHeteroepitaxy of germanium silicon on silicon utilizing alloying control Method for epitaxially growing Gex Si1-x layers on Si utilizing molecular beam epitaxy Dislocation-free epitaxial layer on a lattice-mismatched porous or otherwise submicron patterned single crystal substrate Semiconductor heterostructures having Gex Si1-x layers on Si utilizing molecular beam epitaxy Method of forming a nonsilicon semiconductor on insulator structure Intermediate buffer films with low plastic deformation threshold for lattice mismatched heteroepitaxy Method of producing a thin silicon-on-insulator layer SOI wafer with sige Patent #: 5218213 InventorsApplicationNo. 145986 filed on 10/29/1993US Classes:257/190, With lattice constant mismatch (e.g., with buffer layer to accommodate mismatch)257/12, Heterojunction257/183, HETEROJUNCTION DEVICE257/347, Single crystal semiconductor layer on insulating substrate (SOI)257/616, Containing germanium, Ge257/E21.125Defect and dislocati on suppression due to lattice mismatch, e.g., lattice adaptation (EPO)ExaminersPrimary: Loke, StevenAttorney, Agent or FirmInternational ClassesH01L 031/072H01L 029/06 H01L 027/01 AbstractA structure with strained and defect free semiconductor layers. In a preferred embodiment, silicon on insulator may be used as a substrate for the growth of fully relaxed SiGe buffer layers. A new strain relief mechanism operates, whereby the SiGe layer relaxes without the generation of threading dislocations within the SiGe layer. This is achieved by depositing SiGe on an SOI substrate with a superficial silicon thickness. Initially the strain in the SiGe layer becomes equalized with the thin Si layer by creating tensile strain in the Si layer. Then the strain created in the thin Si layer is relaxed by plastic deformation during an anneal. Since dislocations are formed, and glide in the thin Si layer, threading dislocations are not introduced into the upper SiGe material. A strained silicon layer for heterostructures may then be formed on the SiGe material.Other References
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