Semiconductor array having built-in test circuit for wafer level testing

Patent 5457400 Issued on October 10, 1995. Estimated Expiration Date:

July 23, 2013. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Abstract Claims Description Full Text

Patent References

I² L ring oscillator and method of fabrication
Patent #: 4079338
Issued on: 03/14/1978
Inventor: Kronlage

Method and apparatus for measuring the speed of an integrated circuit device
Patent #: 4890270
Issued on: 12/26/1989
Inventor: Griffith

Circuit arrangement for testing integrated circuit components
Patent #: 4961053
Issued on: 10/02/1990
Inventor: Krug

Wafer-level burn-in testing of integrated circuits
Patent #: 5047711
Issued on: 09/10/1991
Inventor: Smith, et al.

Tester for measuring signal propagation delay through electronic components
Patent #: 5083299
Issued on: 01/21/1992
Inventor: Schwanke, et al.

On-chip integrated circuit speed selection Patent #: 5099196
Issued on: 03/24/1992
Inventor: Longwell, et al.

Inventors

Application

No. 096643 filed on 07/23/1993

US Classes:

324/763, DUT including test circuit324/158.1, MISCELLANEOUS324/765, Test of semiconductor device714/733Built-in testing circuit (BILBO)

Examiners

Primary: Karlsen, Ernest F.

Attorney, Agent or Firm

Protigal; Stanley N., Gratton; Stephen A.

Foreign Patent References

0181548 JP 10/13/1984
0227081 JP 09/13/1989

International Class

G01R 031/28

Abstract

A test circuit is provided for an integrated circuit device, whereby an oscillator is provided on-chip and is activated by a test circuit. The test circuit provides an ability to test the devices while still on the wafer and facilitates burning in the wafer prior to singulating the parts, since it is not necessary to separately establish electrical connections at contact points on the individual integrated circuit devices. The oscillator may be adjusted in speed so that further tests may be effected by changing a test speed through the test circuit. Response of the DUT at different operating speeds is determined by the adjustment of the oscillator speed so that a timing signal used for the testing may be varied.